Workers are aware that the computer software is often supplied to data processing users with the code embodied in a read only memory (ROM). The use of ROM based software is common in personal computers and other applications of microcomputers (e.g. video games). ROM based software for these systems includes systems software and application software. Significant investment is required to develop the programs for such devices, (e.g. those incorporated into ROM's); thus the ease with which ROM contents can be read and copied becomes a concern.
The copying of programs stored in ROM chips can be frustrated by various approaches. One approach is to encrypt the addresses and the data transmitted between the ROM and the central processor unit (CPU) of a data processing system; but here, a person who knows, or can determine, the encryption circuitry can defeat the encryption. Another approach is to monitor program flow and generate address signals within the ROM itself; so that an attempt to read information from the ROM, without executing the program itself, can be detected, and only valid execution paths allowed.
A program providing such monitoring is described in U.S. Pat. No. 4,377,844 (issued to Kaufman on Mar. 22, 1983). The Kaufman patent teaches an apparatus which translates an address from a conventional address register, in a conventional central processing unit, to an internal address for addressing the internal ROM memory. The address translating apparatus includes means which are responsive to a current external memory address and a signal generated in response to a previous memory address to provide the current internal memory address. This address translating apparatus also requires the use of an auxiliary memory device. But a problem with this address translator is that it requires a complicated arrangement of counters and address-generation circuits. The circuit complexity makes it impractical for an inexpensive ROM based software package.
Another approach (e.g. see U.S. Pat. No. 5,155,829 to Koo) is to use a digital memory system in which nonvolatile memory (ROM) will have a 2n addressable memory locations. Thus, an n-bit address is required to address each of the memory locations of the ROM. A buffer memory, or equivalent, is also provided. The buffer memory is a read/write, or random access memory (RAM), memory which is smaller than the ROM memory, i.e., has fewer addressable memory locations. Both the ROM memory and the buffer memory store the same number of bits in each addressable memory location. An external address of n-m bits is applied to the memory system from a central processor unit, for example, and is used to address the buffer memory. The value of m is determined by the relative size of the buffer memory.
An address controller is provided to which external addresses are applied. In response to certain predetermined external addresses, the controller will cause the contents of a portion of the read only memory to be transferred into the buffer memory. The address controller, however, will only apply the external addresses received by the address controller to the buffer memory. As a result, the external address on the address bus is the address of a memory location in the buffer memory, the contents of buffer memory changing as a function of certain predetermined conditions occurring; i.e., certain addresses or address sequences being applied to the address controller.
Thus, attempts to obtain the contents of a memory location from the buffer memory will not necessarily reproduce the same data each time an addressable location in the buffer memory is addressed. This arrangement can also expand the size of the memory addressable by a system with n-m address signals. Also, the address controller is provided with means for detecting certain addresses which should not be used at any time, such as that of an unused location, or for detecting when the external addresses are applied to the controller in an improper manner or sequence.
When improper attempts to address the memory system are executed, the addresses applied to the buffer memory are no longer in proper sequence (although the deviation from a correct program sequence is not immediately evident). The data read-out from the memory system will then no longer have a reproducible correlation between the externally applied addresses and the information stored in the ROM memory. But this (Koo) approach is unduly complex and expensive.
Thus, a need is recognized for a relatively simple system to prevent programs stored in ROM devices from being copied, a system that is relatively economical and which doesn't interfere with the operation of the associated computer system.
Accordingly, it is an object hereof to address at least some of the foregoing needs and to provide one or several of the foregoing, and other, solutions. A more particular object is to provide a secure memory system in which attempts to improperly access the programs stored therein are frustrated. Another object is to provide a secure memory system which is relatively simple and inexpensive to implement.
Another object is to provide a secure ROM memory system in which improper ("illegal") attempts to access memory will "lock up" the associated computer operation.